[Top] [Research] [Lecture] [Publication] [Software] [Link]

Symbol Tokyo University of Marine Science and Technology
Matsumoto Laboratory

face Yohei Matsumoto

Assistant Professor
Fuculty of Marine Technology
Department of Marine System Engineering

E-mail: matumoto_at_kaiyodai.ac.jp (_at_ to @)
TEL/FAX: +81-3-5245-7443

Yohei Matsumoto received the B.S., M.S. and Ph.D degrees in information engineering from the Okayama University in 2001, 2003 and 2005. From 2005 to 2009, he had been a member of the Electroinformatics Group, Nanoelectronics Research Institute, AIST, Japan, and studied low-energy architectures and CAD algorithms of Field-Programmable Gate Arrays (FPGAs). Since 2009, he has been the Assistant Professor of Tokyo University of Marine Science and Technology. His research interest is now in applying VLSI technologies onto various marine systems. [more info. about bio. (Japanese)]



I'm currently working on a great variety of researches related to the marine engineering. I introduce them breifly here.

Automated Navigational Watch System

In Japan, the shortage of the mariners is perceived as the serious problem. The training facility of the seafarers, including our university, is now expected to resolve the problem mainly by educating more people to be the seafarer. On the other side, the automation technologies made much progress in the past decade. Now the full autonomous vehicles are appeared as a viable solution for the problem. I'm currently working mainly on this point; developing autonomous navigation system.

Since the important component of the autonomous navigation system is the watchkeeping system, I had started to develop it first since 2010. Additionally, on the ship in navigation, though there are many devices for watchkeeping aids, seafarers uses mainly their eyes during the task. Thus, my main focus is currently on the point: how can we replace the human eyes to our electrical systems.

In short, current my work is applying generic computer vision algorithms to find the objects, track them and predict the behavior, and further seeking for the new ones suite for the marine navigation.

Ship-to-Ship Data Sharing using AIS Application Specific Message

AIS(Automatic Identification System) has some types of messages which can send arbitrary message user defined. The messages, so called "binary message", have much potential enabling various functionality with data communication in the marine system. I proposed system for sharing watchkeeping information such as targets tracked by ARPA. I examined how a small boat is tracked by the AIS binary message sent by an ARPA equipped ship.

Plankton Image Detector

This research is the part of JEDI (Joint Enviromental Data Integration System). We are now developing the embeded plankton image detector that can be installed into AUV(Autonomous Underwater Vehicle). Related to the task, I developed the DMA driver for Xilinx Zynq devices to transfer data from main memory managed by Linux OS to the FPGA fabric exploiting the scatter gather scheme. The source code is now available in my GitHub.

Imaging System for Underwater Archeorogy






Y. Matsumoto, "Sharing Watchkeeping Information using AIS Application Specific Message," Journal of Japan Institute of Navigation, Vol. 131, pp.9-17, 2014.(Japanese)

Y. Matsumoto, "Ship Image Recognition using HOG," Journal of Japan Institute of Navigation, Vol.129, pp.105-112, 2013. (Japanese)

Y. Matsumoto, "Stabilizing Navigational Image using Inverse Compositional Algorithm," Journal of Japan Institute of Navigation, Vol.127, pp.205-214, 2012. (Japanese)

Y. Matsumoto, "A Color Based Marine Surface Detector for Navigational Images," Journal of Japan Institute of Navigation, Vol. 125, pp.73-82, 2011.(Japanese)

Y. Matsumoto, M. Hioki, T. Kawanami, T. Tsutsumi, T. Nakagawa, T. Sekigawa, H. Koike, "Suppression of intrinsic delay variation in FPGAs using Multiple Configuration," ACM Trans. Reconfigurable Technology and Systems, Vol.1, pp.1-31, 2008.

T. Kawanami, M. Hioki, Y. Matsumoto, T. Tsutsumi, T. Nakagawa, T. Sekigawa, H. Koike, "Optimization of the Body Bias Voltage Set (BBVS) for Flex Power FPGA," IEICE Trans. Vol.90-D, pp.1947-1955, 2007.

Y. Matsumoto and A. Masaki, "Low Power FPGA Using Partially Low Swing Routing Architecture," Electronics and Communications in Japan, Part III: Fundamental Electronic Science Vol. 88, No. 11, pp.11-19, 2005.(Translated version)

Y. Matsumoto and A. Masaki, "Speed Improvement of FPGA by Mixing Multiple Gate Width Routing Switches," Electronics and Communications in japan, Part III: Fundamental Electronics Science, Vol. 88, No. 7, pp.14-22, 2005. (Translated version)

Y. Matsumoto, A. Masaki,"FPGAs with Multidimensional Switch Topology," IEICE Trans., Vol. E88-D, No.4, pp.775-778, 2005.

Y. Matsumoto, A. Masaki, "Low Power FPGA using Partially Low Swing Routing Architecture," IEICE Trans., Vol.J87-A, No.11, pp.1411-1418, 2004.(Japanese)

Y. Matsumoto, A. Masaki, "Speed Improvement of FPGA by Mixing Multiple Gate Width Routing Switches, " IEICE Trans., Vol.J87-A, No.8, pp.1102-1110, 2004.(Japanese)


Y. Nagashima, Y. Matsumoto, H. Kondo, S. Gallager, H. Yamazaki, "Development of Realtime Plankton Image Archiver for AUVs," Proc. AUV2014, 2014.

H. Kondo, M. Sato, T. Hotta, A. Withamana, M. Osakabe, Y. Matsumoto, "Development of a Marine Ecosystem and Microstructure Monitoring AUV for Plankton Environment," Proc. AUV2014, 2014.

Y. Matsumoto, "Ship detection for automating navigational watch," Proc. World Automation Congress, 2014.

T.Sasakura, N. Miyamoto, Y. Miyamoto, Y. Matsumoto, S. Ito, "Correlation ASIC Applied to Underwater Acoustics," Proc. Intl. Conf. Underwater Acoustics, pp.1445-1450, 2013.

M. Hioki, T. Sekigawa, T.Nakagawa, H. Koike, Y. Matsumoto, T. Kawanami, T. Tsutsumi, "Fully-functional FPGA ProtoType with Fine-grain Programmable Body Biasing," ACM/SIGDA Intl. Symp. FPGA, pp73-80, 2013.

N.Miyamoto, Y.Matsumoto, H.Koike, T.Matsumura, K. Osada, Y. Nakagwa, T.Ohmi, "Performance Comparison of 2D and 3D FPGAs using true-3D CAD tool," Proc. Midwest Symp. Circuit and Systems, pp.1-4, 2011

N. Miyamoto, Y. Matsumoto, H. Koike, T. Matsumura, K. Osada, Y. Nakagawa, T. Ohmi, "Development of a CAD tool for 3D-FPGAs," Proc. IEEE Intl. 3D Systems Integration Conference, pp.1-6, 2010

M. Hioki, T. Kawanami, Y. Matsumoto, T. Tsutsumi, T. Nakagawa, T.Sekigawa, H.Koike, "Power Configurable Block Array Connected in Series as First Prototype Flex Power FPGA Chip," Proc. Intl. Conf. Field Programmable Technology, pp.285-288, 2010.

Y. Matsumoto, M. Hioki, T. Kawanami, T. Tsutsumi, T. Nakagawa, T. Sekigawa, H. Koike, "Performance and Yield Enhancement of FPGAs, with Within-die Variation using Multiple Configurations," Proc. Intl. Symp,. Field-Programmable Gate Array, pp.169-177, 2007.

T. Kawanami, M. Hioki, Y. Matsumoto, T. Tsutsumi, T. Nakagawa, T. Sekigawa, H. Koike, "Optimal Set of Body Bias Voltages for an FPGA with Field-Programmable Vth Components," Intl. Conf. Field-Programmable Technology, pp.329-332, 2006.


T. Sekigawa, Y. Matsumoto, H.Koike, JP5382886B, 2013.

Y. Matsumoto, H. Koike, JP5099780B, 2012.

Y. Matsumoto, H. Koike, US7886250B2, 2011.

M. Hioki, Y. Matsumoto, H. Koike, JP4883578B, 2011

Y. Matsumoto, A. Masaki, JP4576538B, 2010.

Y. Matsumoto, A. Masaki, US7768314, 2010.

Y. Matsumoto, H. Koike, JP4461242B, 2010.

Y. Matsumoto, H. Koike, US7797664, 2010.

Y. Matsumoto, H. Koike, JP4385136B, 2009.

Y. Matsumoto, H. Koike, JP4258671B, 2009.



My own source codes are available freely on GitHub! [ My GitHub ]



Symbol Tokyo University of Marine Science and Technology